tmp86fp24 TOSHIBA Semiconductor CORPORATION, tmp86fp24 Datasheet - Page 89

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tmp86fp24

Manufacturer Part Number
tmp86fp24
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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TC2 pin input
Internal clock
Up counter
TC2DR
INTTC2 interrupt
(3) Window mode
TC2 external pin input (window pulse) is “H” level. The contents of TC2DR are
compared with the contents of up counter. If a match found, an INTTC2 interrupt is
generated, and the up counter is cleared.
selected internal clock.
Note: In the window mode, before the SLOW/SLEEP mode is entered, the timer should
In this mode, counting up performed on the rising edge of an internal clock during
The maximum applied frequency (TC2 input) must be considerably slower than the
Example: Generates an interrupt, inputting “H” level pulse width of 120 ms or more
be halted by setting TC2CR<TC2S> to “0”.
n
0
(at fc
Figure 2.7.3 Window Mode Timing Chart
LDW
DI
SET
EI
LD
LD
16 MHz, DV7CK
1
2
(TC2DR), 00EAH
(EIRE). 4
(TC2CR), 00000101B
(TC2CR), 00100101B
86FP24-87
0).
n  3
n  2
;
;
;
;
;
;
Match detect
Sets TC2DR (120 ms y 2
IMF
Enables INTTC2 interrupt.
IMF
TC2CK m “001”, TC1M m “1”
Starts TC2.
n  1
“0”
“1”
n 0
Counter clear
1
TMP86FP24
13
2
2007-08-24
/fc
3
00EAH).

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