tmp86fp24 TOSHIBA Semiconductor CORPORATION, tmp86fp24 Datasheet - Page 65
tmp86fp24
Manufacturer Part Number
tmp86fp24
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP86FP24.pdf
(217 pages)
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Clock input
Internal reset
STOP instruction
WAKE
2.2.9
pin
release of STOP mode by an external interrupt signal input. This pin is assigned as the
dedicated output pin and it has N-ch open-drain form. This function enables the real time
notification of the start/release of STOP mode timing to the outside. Therefore, it is
effective for the system which requires the stop control against a peripheral device
connected to the microcontroller.
STOP mode is initiated and the operation of CPU is stopped, the
high impedance state. When STOP mode is released by an external interrupt signal input,
the
During reset, the
pin state and Figure 2.2.16 shows the
WAKE
The TMP86FP24 has the function of outputting a monitor signal to the outside upon
While the microcontroller is operating, “L” level is output from the
During operation (except in STOP mode)
WAKE
STOP (STOP mode start signal)
High-Z
RESET (Internal reset signal)
Pin
pin becomes “L” level. Therefore, during warm-up, the
During STOP mode
During warm-up
During reset
State
WAKE
Figure 2.2.16
“L” Output
Table 2.2.6
pin is in the high impedance state. Table 2.2.6 shows the
Figure 2.2.15
86FP24-63
WAKE
WAKE
Start
WAKE
Pin Output Timing
WAKE
Pin State
High-Z
pin output timing.
Pin
VDD
WAKE
High impedance
High impedance
Release
“L”
“L”
pin output
WAKE
Warm-up
pin
“L” Output
WAKE
WAKE
end
WAKE
pin becomes the
pin is “L” level.
TMP86FP24
2007-08-24
pin. When
WAKE
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