tmp86fp24 TOSHIBA Semiconductor CORPORATION, tmp86fp24 Datasheet - Page 140

• Manufacturer Part Number: tmp86fp24
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

SO1 pin
SIO1CR1<SIOS>
SIO1SR<SIOF>
SIO1SR<SEF>
SIO1SR<TXF>
INTSIO1
SIO1SR<TXERR>
SCK1
SO1 pin
SIO1CR1<SIOS>
SIO1SR<SIOF>
SIO1SR<SEF>
SIO1SR<TXF>
INTSIO1
SIO1SR<TXERR>
SCK1
Figure 2.14.11 Occurrence of Transmit Error (Where, before the SIO is directed to stop transferring
Note: When the SIO is running (SIO1SR<SIOF>
Figure 2.14.10 Transmit Mode Operation (Where 3 bytes are transferred on an external source clock)
pin
pin
Second last byte



number of bytes specified in SIO1CR2<SIORXD> to the
After confirmation of SIO1SR<SIOF>
SIO1CR2 and then write the transmit data to SIO1BUF.










A0
(SIO1CR1<SIOS>
pulses than a specified number of bytes occur.)
Transmit-data write
B7
SIO1CR1<SIOS>
the SIO to start transferring.
B6
A
External SCK input
7

A
6
A
B5
5
“0” is written), the transfer of the last byte is completed and more
Last byte
A
4
“1” causes
“0”, set SIO1CR1 and
A
3
B4
A
86FP24-138
2

A
1
A
0
B3
B
“1”), do not supply more transfer clock pulses than the
7

B
1
B
B2
INTSIO1 is accepted.
0
C
7
Last-byte transfer
C
INTSIO1 is accepted.
(In the interrupt service routine, clear
SIO1CR1<SIOS> to “0” and check the
SIO1SR<TXERR>.)
6
B1
SCK1
C 5 C 4 C 3 C 2 C 1
SIO1CR1<SIOS>
“0” causes the SIO
to stop transferring.
After confirmation of SIO1SR<SIOF>
and SIO1SR<TXERR>
transfer data to SIO1BUF.
pin.
B0
The SIO is forced to halt because of
SIO1SR<TXERR> occurrence
(SIO1CR1<SIOINH>
C 0

SIO1CR1<SIOS>
the SIO to stop transferring.
SIO1CR1<SIOINH>
causes the flag to be cleared
and forces the SIO to halt (be
initialized).
External SCK input
More pulses than a specified
number of bytes occur.

SIO1CR1<SIOS>
“1” causes the SIO
to start transferring.

“0”, set the

Transmit data are
written.
TMP86FP24
2007-08-24
“1”).
“0” causes


“1”

“0”