tmp86fp24 TOSHIBA Semiconductor CORPORATION, tmp86fp24 Datasheet - Page 18
tmp86fp24
Manufacturer Part Number
tmp86fp24
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP86FP24.pdf
(217 pages)
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Single
clock
clock
Dual
Operating Mode
(a) Single clock mode
(b) Dual clock mode
Note 1: NORMAL1 and NORMAL2 modes are generically called NORMAL; SLOW1 and SLOW2 are called SLOW;
Note 2: The mode is released by falling edge of TBTCR<TBTCK> setting.
RESET
NORMAL1
IDLE1
IDLE0
STOP
NORMAL2
IDLE2
SLOW2
SLEEP2
SLOW1
SLEEP1
SLEEP0
STOP
SLEEP2
SLEEP1
IDLE1
IDLE2
mode
mode
mode
mode
IDLE0, IDLE1 and IDLE2 are called IDLE; SLEEP0, SLEEP1 and SLEEP2 are called SLEEP.
High frequency Low frequency
Oscillation
Oscillation
Stop
Stop
SYSCR2<IDLE>
SYSCR2<IDLE>
SYSCR2<IDLE>
SYSCR2<IDLE>
SYSCR2<TGHALT>
SYSCR2<SYSCK>
SYSCR2<XTEN>
SYSCR2<XTEN>
Figure 1.4.6 Operating Mode Transition Diagram
Oscillator
Interrupt
Interrupt
Interrupt
Interrupt
Oscillation
Stop
Stop
“1”
“1”
“1”
“1”
(Note 2)
“0”
“1”
“0”
“1”
Operate with low frequency
Operate with low frequency
86FP24-16
NORMAL1
NORMAL2
SLOW2
SLEEP0
SLOW1
IDLE0
mode
mode
mode
mode
mode
mode
Operate with high
CPU Core
frequency
Operate
Reset
SYSCR2<XTEN>
SYSCR2<SYSCK>
Halt
Halt
Halt
Halt
(Note 2)
SYSCR2<XEN>
SYSCR2<TGHALT>
STOP
STOP
SYSCR1<STOP>
SYSCR1<STOP>
STOP
SYSCR1<STOP>
pin input
pin input
pin input
Reset release
Operate
Operate
“0”
Reset
“1”
TBT
Halt
Halt
“1”
“1”
“1”
“1”
“1”
Peripherals
Operate
Operate
Reset
Other
Halt
Halt
RESET
STOP
TMP86FP24
Cycle Time
2007-08-24
Machine
4/fc [s]
4/fc [s]
4/fs [s]
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