tmp86fp24 TOSHIBA Semiconductor CORPORATION, tmp86fp24 Datasheet - Page 48

• Manufacturer Part Number: tmp86fp24
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

2.
2.1
Address
0000H
0C
0D
1C
1D
0A
0B
0E
0F
1A
1B
1E
1F
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
On-chip Peripherals Functions
Special Function Register (SFR)
transfers are performed through the special function register (SFR). The SFR is mapped on
address 0000H to 003FH, DBR is mapped on address 1F80H to 1FFFH.
register (DBR) for TMP86FP24.
Note 1: Do not access reserved areas by the program.
Note 2: : Cannot be accessed.
Note 3: Write-only registers and interrupt latches cannot use the read-modify-write instructions (Bit manipulation
TC3DRB (Timer register 3B)
The TMP86FP24 adopts the memory mapped I/O system, and all peripheral control and data
Figure 2.1.1 to Figure 2.1.2 indicate the special function register (SFR) and data buffer
SIO1SR (SIO1 status)
SIO2SR (SIO2 status)
instructions such as SET, CLR, etc. and logical operation instructions such as AND, OR, etc.).
Figure 2.1.1 The Special Function Register (SFR) for TMP86FP24 (1/2)
Read
P6CR1 (P6 port input/output control)
P4PDCR(P4 port pull-down control)
P0OUTCR (P0 port output control)
P1OUTCR (P1 port output control)
P5OUTCR (P5 port output control)
TC3CR (Timer counter 3 control)
TC2CR (Timer counter 2 control)
TC5CR (Timer counter 5 control)
TC1CR (Timer counter 1 control)
ADCCR1 (AD control register 1)
ADCCR2 (AD control register 2)
TC3DRA (Timer register 3A)
SIO1BUF (SIO1 data buffer)
SIO2BUF (SIO2 data buffer)
P0DR (P0 port output latch)
P1DR (P1 port output latch)
P2DR (P2 port output latch)
P3DR (P3 port output latch)
P4DR (P4 port output latch)
P5DR (P5 port output latch)
P6DR (P6 port output latch)
P9DR (P9 port output latch)
SIO1CR1 (SIO1 control 1)
SIO1CR2 (SIO1 control 2)
SIO2CR1 (SIO2 control 1)
SIO2CR2 (SIO2 control 2)
TC5DR (Timer register 5)
Reserved
Reserved
Write
86FP24-46
Address
0020H
2C
2D
3C
3D
2A
2B
2E
2F
3A
3B
3E
3F
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
ADCDR2 (AD result register 2)
ADCDR1 (AD result register 1)
TC3SEL (Timer counter 3 input control)
Read
P4LCR (P4 segment output control)
EINTCR (External interrupt control)
P3OUTCR (P3 port output control)
EIRE (Interrupt enable register)
EIRH (Interrupt enable register)
EIRL (Interrupt enable register)
TBTCR (TBT/TG/DVO control)
TC1DRAL (Timer register 1A)
TC1DRAH (Timer register 1A)
TC1DRBL (Timer register 1B)
TC1DRBH (Timer register 1B)
P6CR2 (P6 port input control)
PSW (Program status word)
SYSCR1 (System control 1)
SYSCR2 (System control 2)
TC2DRH (Timer register 2)
TC2DRL (Timer register 2)
ILH (Interrupt latch)
ILE (Interrupt latch)
ILL (Interrupt latch)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
WDTCR1 (Watchdog timer control)
WDTCR2 (Watchdog timer control)
Write
TMP86FP24
2007-08-24