tmp86fp24 TOSHIBA Semiconductor CORPORATION, tmp86fp24 Datasheet - Page 145
tmp86fp24
Manufacturer Part Number
tmp86fp24
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP86FP24.pdf
(217 pages)
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SI1 pin
SIO1CR1<SIOS>
SIO1SR<SIOF>
SIO1SR<SEF>
SIO1SR<RXF>
INTSIO1
SIO1SR<RXERR>
SCK1
Note 1: When the SIO is running (SIO1SR<SIOF>
Note 2: After data reception is completed, a receive error occurs if eight clock pulses are supplied to the
Figure 2.14.14 Occurrence of Receive Error (2 bytes are transferred on an external source clock)
pin
After confirmation of
SIO1SR<SIOF>
and SIO1CR2.
number of bytes specified in SIO1CR2<SIORXD> at
shows a case in which a receive error occurs when eight clock pulses are supplied to the
before the INTSIO1 interrupt service routine writes SIO1CR1<SIOS>
SCK1
pin before a direction to stop the SIO becomes valid (SIO1CR1<SIOS> “0”). Figure 2.14.14
External SCK input
SIO1CR1<SIOS>
the SIO to start transferring.
“0”, set SIO1CR1
A
7
A
6
A
0
B
“1” causes
7
B
Last-byte transfer
6
INTSIO1 is accepted.
(In the interrupt service routine, clear
SIO1CR1<SIOS> to “0” and confirm
SIO1SR<SIOF> “0”, SIO1SR<RXERR> “0”,
and then, read data from SIO1BUF.)
B
86FP24-143
5
B
4
B
3
B
“1”), do not supply more transfer clock pulses than the
2
B
1
B
0
SCK1
pin.
“0”.
SIO1CR1<SIOINH>
causes the flag to be
cleared and forces the
SIO to halt (be initialized).
SIO1CR1<SIOS>
causes the SIO to stop
transferring.
TMP86FP24
2007-08-24
SCK1
“1”
“0”
pin
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