tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 238

• Manufacturer Part Number: tmp89fm42
• Description: 8 Bit Microcontroller
• Manufacturer: TOSHIBA Semiconductor CORPORATION

16.11 Transmit/Receive Operation
16. Asynchronous Serial Interface (UART)
RA001
16.11Transmit/Receive Operation
16.11.1Data transmit operation
16.11.2Data receive operation
data buffer). Writing data into TD0BUF sets UART0SR<TBFL> to "1", transfers the data to the transmit shift
register, and outputs the data sequentially from the TXD0 pin. The data output includes a start bit, stop bits
whose number is specified in UART0CR1<STBT> and a parity bit if parity addition is specified. Select the
data transfer baud rate using UART0CR1<BRG>, UART0CR2<RTSEL> and UART0DR. When data trans-
mission starts, the transmit buffer full flag UART0SR<TBFL> is cleared to "0" and an INTTXD0 interrupt
request is generated.
RD0BUF (receive data buffer). At this time, the transmitted data includes a start bit, stop bit(s) and a parity bit
if parity addition is specified. When the stop bit(s) are received, data only is extracted and transferred to
RD0BUF (receive data buffer). Then the receive buffer full flag UART0SR<RBFL> is set and an INTRXD0
interrupt request is generated. Set the data transfer baud rate using UART0CR1<BRG>, UART0CR2<RTSEL>
and UART0DR.
but discarded; data in the RD0BUF is not affected.
Set UART0CR1<TXE> to "1". Check UART0SR<TBFL> = "0", and then write data into TD0BUF (transmit
Note 1: After data is written into TD0BUF, if new data is written into TD0BUF before the previous data is transferred
Note 2: Under the conditions shown in Table 16-9, the TXD0 pin output is fixed at the L or H level according to the
Set UART0CR1<RXE> to "1". When data is received via the RXD0 pin, the received data is transferred to
If an overrun error occurs when data is received, the data is not transferred to RD0BUF (receive data buffer)
to the shift register, the new data is written over the previous data and is transferred to the shift register.
setting of UART0CR1<IRDASEL>.
Table 16-9 TXD0 Pin Output
When UART0CR1<TXE> is "0"
From when "1" is written to
UART0CR1<TXE> to when the trans-
mitted data is written to TD0BUF
When the STOP, IDLE0 or SLEEP0
mode is active
Condition
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IRDASEL="0"
H level
TXD0 pin output
IRDASEL="1"
L level
TMP89FM42