tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 289

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tmp89fm42

Manufacturer Part Number
tmp89fm42
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet

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RA001
18.4.11Arbitration lost detection monitor
SCL (Bus)
SDA pin (Master 1)
SDA pin (Master 2)
SDA (Bus)
register, except SBI0CR2<SBIM> and the SBI0CR1, I2C0AR<SA> and SBI0SR2 registers, are initialized.
mented in order to guarantee the contents of transferred data.
neously on a bus. Master 1 and Master 2 output the same data until point "a". After that, when Master 1 outputs
"1" and Master 2 outputs "0", since the SDA line of a bus is wired AND, the SDA line is pulled down to the
low level by Master 2. When the SCL line of a bus is pulled-up at point "b", the slave device reads data on the
SDA line, that is data in Master 2. Data transmitted from Master 1 becomes invalid. The state in Master 1 is
called "arbitration lost". A master device which loses arbitration releases the SDA pin and the SCL pin in order
not to effect data transmitted from other masters with arbitration. When more than one master sends the same
data at the first word, arbitration occurs continuously after the second word.
the SCL line. If the levels are unmatched, arbitration is lost and SBI0SR2<AL> is set to "1".
is switched to a slave receiver mode. Thus, the serial bus interface circuit stops output of clock pulses during
data transfer after the SBI0SR2<AL> is set to "1". After the data transfer is completed, SBICR2<PIN> is
cleared to "0" and the SCL pin is pulled down to the low level.
data to the SBI0CR2.
A software reset is generated by writing "10" and then "01" to SBI0CR2<SWRST>.
After a software reset is generated, the serial bus interface circuit is initialized and all the bits of SBI0CR2
Since more than one master device can exist simultaneously on a bus, a bus arbitration procedure is imple-
Data on the SDA line is used for bus arbitration of the I
The following shows an example of a bus arbitration procedure when two master devices exist simulta-
The serial bus interface circuit compares levels of a SDA line of a bus with its SDA pin at the rising edge of
When SBI0SR2<AL> is set to "1", SBI0CR2<MST> and SBI0CR2<TRX> are cleared to "0" and the mode
SBI0SR2<AL> is cleared to "0" by writing data to the SBI0DBR, reading data from the SBI0DBR or writing
Figure 18-12 Arbitration Lost
Page 275
a
b
2
C bus.
The SDA pin becomes "1" after losing arbitration.
TMP89FM42

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