tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 265
tmp89fm42
Manufacturer Part Number
tmp89fm42
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP89FM42.pdf
(408 pages)
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RA001
SIO0CR<SIOS>
SIO0CR<SIOM>
SIO0SR<SIOF>
SIO0SR<SEF>
SIO0SR<REND>
Internal clock
SI0 pin (input)
SCLK0 pin (output)
INTSIO0 interrupt request
SIO0BUF
Read SIO0BUF
Figure 17-8 8-bit Receive Mode (Internal Clock and Reserved Stop)
registers keep their values.
By setting SIO0CR<SIOM> to "00", SIO0CR<SIOS> and SIO0SR are cleared to "0" and the SIO stops
the operation, regardless of the SIO0SR<SEF> value. If the internal clock is selected, the SCLK0 pin
returns to the initial level.
After the operation has stopped completely, SIO0SR<SIOF and SEF> are cleared to "0". Other SIO0SR
The receive operation can be forced to stop by setting SIO0CR<SIOM> to "00" during the operation.
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7
Data A
A
Page 251
Automatic wait
Reading data A
10
Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7
Reserved
stop
Data C
C
Reading data C
TMP89FM42
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