tmp89fm42 TOSHIBA Semiconductor CORPORATION, tmp89fm42 Datasheet - Page 36
tmp89fm42
Manufacturer Part Number
tmp89fm42
Description
8 Bit Microcontroller
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
1.TMP89FM42.pdf
(408 pages)
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2.3 System clock controller
2. CPU Core
RA001
2.3.5 Operation mode control circuit
2.3.4.2
2.3.5.1
Note 2: The clock output from the oscillation circuit is used as the input clock to the warm-up counter. The warm-up time contains
frequency clocks, and switches the main system clock (fm).
modes are controlled by the system control registers (SYSCR1 and SYSCR2).
The operation mode control circuit starts and stops the oscillation circuits for the high-frequency and low-
There are three operating modes: the single-clock mode, the dual-clock mode and the STOP mode. These
Figure 2-7 shows the operating mode transition diagram.
errors because the oscillation frequency is unstable until the oscillation circuit becomes stable. Set the sufficient time for
the oscillation start property of the oscillator.
oscillation becomes stable, at a mode change from NORMAL1 to NORMAL2 or from SLOW1 to
SLOW2.
the stopped oscillation circuit to start oscillation and the 14-stage counter to start counting the selected
input clock.
is stopped and the counter is cleared.
WUCCR<WUCRST> is cleared to "0".
restart the warm-up operation, SYSCR2<XEN> or SYSCR2<XTEN> must be cleared to "0".
WUCCR<WUCSEL>
Warm-up counter operation when the oscillation is enabled by the software
Single-clock mode
The warm-up counter serves to secure the time after the oscillation is enabled by the software before the
Select the input clock to the frequency division circuit at WUCCR<WUCSEL>.
Select the input clock to the 14-stage counter at WUCCR<WUCDIV>.
After the warm-up time is set at WUCDR, setting SYSCR2<XEN> or SYSCR2<XTEN> to "1" allows
When the upper 8 bits of the counter become equal to WUCDR, an INTWUC interrupt occurs, counting
Set WUCCR<WUCRST> to "1" to discontinue the warm-up operation.
By setting it to "1", the count-up operation is stopped, the warm-up counter is cleared, and
SYSCR2<XEN> and SYSCR2<XTEN> hold the values when WUCCR<WUCRST> is set to "1". To
Note: The warm-up counter starts counting when SYSCR2<XEN> or SYSCR2<XTEN> is changed from "0"
Note: The clock output from the oscillation circuit is used as the input clock to the warm-up counter. The
Only the gear clock (fcgck) is used for the operation in the single-clock mode.
to "1". The counter will not start counting by writing "1" to SYSCR2<XEN> or SYSCR2<XTEN> when it
is in the state of "1".
warm-up time contains errors because the oscillation frequency is unstable until the oscillation circuit
becomes stable. Set the sufficient time for the oscillation start property of the oscillator.
0
1
WUCCR<WUCDIV>
00
01
10
00
01
10
11
11
Page 22
Counter input clock
fc / 2
fs / 2
fc / 2
fs / 2
fc / 2
fs / 2
fc
fs
3
3
2
2
2
2
2
2
2
2
2
2
6
7
8
9
6
7
8
9
/ fc to 255 x 2
/ fc to 255 x 2
/ fc to 255 x 2
/ fc to 255 x 2
/ fs to 255 x 2
/ fs to 255 x 2
/ fs to 255 x 2
/ fs to 255 x 2
Warm-up time
6
7
8
9
6
7
8
9
/ fc
/ fc
/ fc
/ fc
/ fs
/ fs
/ fs
/ fs
TMP89FM42
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