r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 131

• Manufacturer Part Number: r4f2456
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

4.6
Trap instruction exception handling starts when a TRAPA instruction is executed. Trap instruction
exception handling can be executed at all times in the program execution state.
The trap instruction exception handling is as follows:
1. The values in the program counter (PC), condition code register (CCR), and extended register
2. The interrupt mask bit is updated and the T bit is cleared to 0.
3. A vector address corresponding to the interrupt source is generated, the start address is loaded
The TRAPA instruction fetches a start address from a vector table entry corresponding to a vector
number from 0 to 3, as specified in the instruction code.
Table 4.4 shows the status of CCR and EXR after execution of trap instruction exception handling.
Table 4.4
Legend:
1:
0:
—: Retains value prior to execution
Interrupt Control Mode
0
2
(EXR) are saved in the stack.
from the vector table to the PC, and program execution starts from that address.
Set to 1
Cleared to 0
Trap Instruction Exception Handling
Status of CCR and EXR after Trap Instruction Exception Handling
I
1
1
CCR
UI
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Rev. 1.00 Sep. 19, 2008 Page 101 of 1342
I2 to I0
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Section 4 Exception Handling
EXR
REJ09B0467-0100
T
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0