r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 967

• Manufacturer Part Number: r4f2456
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

Bit
1
Bit Name
EP2 DMAE
Initial
Value
0
R/W
R/W
Description
EP2 DMA Transfer Enable
When this bit is set, DMA transfer is enabled from
memory to the endpoint 2 transmit FIFO buffer. If
there is at least one byte of open space in the FIFO
buffer, a DMA transfer request signal (USB INTN1) is
asserted. In DMA transfer, when 64 bytes are written
to the FIFO buffer the EP2 packet enable bit is set
automatically, allowing 64 bytes of data to be
transferred, and if there is still space in the other side
of the two FIFOs, the DMA transfer request signal
(USB INTN1) is asserted again. However, if the size
of the data packet to be transmitted is less than 64
bytes, the EP2 packet enable bit is not set
automatically, and so should be set by the CPU with a
DMA transfer end interrupt.
As EP2-related interrupt requests to the CPU are not
automatically masked, interrupt requests should be
masked as necessary in the interrupt enable register.
•
1. Write of 1 to the EP2 DMAE bit in DMAR
2. Set the DMAC to activate through DREQ1
3. Transfer count setting in the DMAC
4. DMAC activation
5. DMA transfer
6. DMA transfer end interrupt generated
See section 16.8.4, DMA Transfer for Endpoints 2.
Operating procedure
(USB INTN1)
Rev. 1.00 Sep. 19, 2008 Page 937 of 1342
Section 16 USB Function Module (USB)
REJ09B0467-0100