r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 656
r4f2456
Manufacturer Part Number
r4f2456
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R4F2456.pdf
(1376 pages)
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Section 10 I/O Ports
10.14.1 Port F Data Direction Register (PFDDR)
The individual bits of PFDDR specify input or output for the pins of port F. PFDDR cannot be
read; if it is, an undefined value will be read.
Rev. 1.00 Sep. 19, 2008 Page 626 of 1342
REJ09B0467-0100
Bit
7
6
5
4
3
2
1
0
Bit Name
PF7DDR
PF6DDR
PF5DDR
PF4DDR
PF3DDR
PF2DDR
PF1DDR
PF0DDR
Initial Value
1/0 *
0
0
0
0
0
0
0
R/W
W
W
W
W
W
W
W
W
Description
•
•
Modes 7 (when EXPE = 1), 1, 2, and 4
Pin PF7 functions as the φ output pin when the
corresponding PFDDR bit is set to 1, and as an
input port when the bit is cleared to 0.
Pin PF6 functions as the AS output pin when the
ASOE bit is set to 1. When the ASOE bit is
cleared to 0, pin PF6 is an I/O port and its
function can be switched with PF6DDR.
Pins PF5 and PF4 are automatically designated
as bus control outputs (RD and HWR).
Pin PF3 functions as the LWR output pin when
the LWROE bit is set to 1. When the LWROE bit
is cleared to 0, pin PF3 is an I/O port and its
function can be switched with PF3DDR.
Pins PF2 to PF0 function as bus control
input/output pins (LCAS, UCAS, and WAIT)
when the appropriate bus controller settings are
made. Otherwise, these pins are output ports
when the corresponding PFDDR bits are set to 1
and are input ports when the bits are cleared to
0.
Mode 7 (when EXPE = 0)
Pin PF7 functions as the φ output pin when the
corresponding PFDDR bit is set to 1, and as an
input port when the bit is cleared to 0.
Pins PF6 to PF0 are I/O ports, and their
functions can be switched with PFDDR.
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