r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 316

• Manufacturer Part Number: r4f2456
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

Section 6 Bus Controller (BSC)
In burst access in RAS down mode, the settings of bits ICIS2, ICIS1, ICIS0, and IDLC are valid
and an idle cycle is inserted. However, in read access, note that the timings of DQMU and DQML
differ according to the settings of the IDLC bit. The timing in this case is illustrated in figures
6.85 and 6.86. In write access, DQMU and DQML are not in accordance with the settings of the
IDLC bit. The timing in this case is illustrated in figure 6.87.
Rev. 1.00 Sep. 19, 2008 Page 286 of 1342
REJ09B0467-0100
DQMU, DQML
Precharge-sel
Address bus
HWR, LWR
Data bus
CKE
CAS
RAS
WE
RD
φ
Figure 6.85 Example of Idle Cycle Operation in RAS Down Mode
PALL ACTV READ
address
(Read in Different Area) (IDLC = 0, CAS Latency 2)
Column
T
Continuous synchronous
DRAM space read
p
address
address
Row
Row
T
r
T
Column address 1
c1
T
cl
High
High
T
c2
External space read
T
External address
External address
1
NOP
T
2
T
3
Idle cycle
T
Continuous synchronous
DRAM space read
i
Column address 2
READ
T
c1
T
Cl
NOP
T
c2