r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 277

• Manufacturer Part Number: r4f2456
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

6.8.3
If the ABW2 bit in ABWCR corresponding to an area designated as continuous synchronous
DRAM space is set to 1, areas 2 to 5 are designated as 8-bit continuous synchronous DRAM
space; if the bit is cleared to 0, the areas are designated as 16-bit continuous synchronous DRAM
space. In 16-bit continuous synchronous DRAM space, ×16-bit configuration synchronous DRAM
can be connected directly.
In 8-bit continuous synchronous DRAM space the upper half of the data bus, D15 to D8, is
enabled, while in 16-bit continuous synchronous DRAM space both the upper and lower halves of
the data bus, D15 to D0, are enabled.
Access sizes and data alignment are the same as for the basic bus interface: see section 6.5.1, Data
Size and Data Alignment.
6.8.4
Table 6.10 shows pins used for the synchronous DRAM interface and their functions.
Since the CS2 to CS4 pins are in the input state after a reset, set DDR to 1 when RAS, CAS, and
WE signals are output. For details, see section 10, I/O Ports. Set the OEE bit of the DRAMCR
register to 1 when the CKE signal is output.
Data Bus
Pins Used for Synchronous DRAM Interface
Rev. 1.00 Sep. 19, 2008 Page 247 of 1342
Section 6 Bus Controller (BSC)
REJ09B0467-0100