r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 925
r4f2456
Manufacturer Part Number
r4f2456
Description
16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.R4F2456.pdf
(1376 pages)
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15.7.8
When the GM bit in SMR is set to 1, the clock output level can be fixed with bits CKE1 and
CKE0 in SCR. At this time, the minimum clock pulse width can be made the specified width.
Figure 15.31 shows the timing for fixing the clock output level. In this example, GM is set to 1,
CKE1 is cleared to 0, and the CKE0 bit is controlled.
CKE0
SCK
Clock Output Control
Figure 15.30 Example of Reception Processing Flow
Figure 15.31 Timing for Fixing Clock Output Level
No
No
Specified pulse width
RDRF flag in SSR to 0
Read RDR and clear
All data received?
Clear RE bit to 0
ORER = 0 and
Start reception
Initialization
RDRF = 1?
PER = 0
Start
Yes
Yes
Yes
Section 15 Serial Communication Interface (SCI, IrDA)
No
Rev. 1.00 Sep. 19, 2008 Page 895 of 1342
Specified pulse width
Error processing
REJ09B0467-0100
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