r4f2456 Renesas Electronics Corporation., r4f2456 Datasheet - Page 305

• Manufacturer Part Number: r4f2456
• Description: 16-bit Single-chip Microcomputer H8s Family / H8s/2400 Series
• Manufacturer: Renesas Electronics Corporation.

(2) Read Data Extension
If the CKSPE bit is set to 1 in DRACCR when the continuous synchronous DRAM space is read-
accessed in DMAC/EXDMAC single address mode, the establishment time for the read data can
be extended by clock suspend mode. The number of states for insertion of the read data extension
cycle (Tsp) is set in bits RDXC1 and RDXC0 in DRACCR. Be sure to set the OEE bit to 1 in
DRAMCR when the read data will be extended. The extension of the read data is not in
accordance with the bits DDS and EDDS.
Figure 6.74 shows the timing chart when the read data is extended by two cycles.
Figure 6.74 Example of Timing when the Read Data Is Extended by Two States
(DDS = 1, or EDDS = 1, RDXC1 = 0, RDXC0 = 1, CAS Latency 2)
DACK or EDACK
DQMU, DQML
Precharge-sel
Address bus
SDRAMφ
Data bus
CKE
CAS
RAS
WE
φ
PALL ACTV
address
Column
T
p
address
address
Row
Row
T
r
READ
T
c1
T
cl
Rev. 1.00 Sep. 19, 2008 Page 275 of 1342
NOP
T
c2
Column address
T
sp1
Section 6 Bus Controller (BSC)
T
sp2
REJ09B0467-0100