m52d128168a Elite Semiconductor Memory Technology Inc., m52d128168a Datasheet - Page 16

• Manufacturer Part Number: m52d128168a
• Description: 2m X 16 Bit X 4 Banks Mobile Synchronous Dram
• Manufacturer: Elite Semiconductor Memory Technology Inc.

CBR (auto) refresh command
is generated internally.
activate command.
cannot accept any other command.
Self refresh entry command
When CKE goes to high, the DRAM exits the self refresh mode.
internally, so there is no need for external control.
Burst stop command
This command terminates the current burst operation.
Burst stop is valid at every burst length.
Elite Semiconductor Memory Technology Inc.
This command is a request to begin the CBR refresh operation. The refresh address
Before executing CBR refresh, all banks must be precharged.
After this cycle, all banks will be in the idle (precharged) state and ready for a row
During t
After the command execution, self refresh operation continues while CKE remains low.
During self refresh mode, refresh interval and refresh operation are performed
Before executing self refresh, all banks must be precharged.
( CS , RAS , CAS = Low, WE , CKE = High)
( CS , RAS , CAS , CKE = Low , WE = High)
( CS , WE = Low, RAS , CAS = High)
RFC
period (from refresh command to refresh or activate command), the DRAM
Publication Date: Aug. 2009
Revision: 1.3
M52D128168A
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