m52d128168a Elite Semiconductor Memory Technology Inc., m52d128168a Datasheet - Page 33

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m52d128168a

Manufacturer Part Number
m52d128168a
Description
2m X 16 Bit X 4 Banks Mobile Synchronous Dram
Manufacturer
Elite Semiconductor Memory Technology Inc.
Datasheet
ESMT
Page Read & Write Cycle at Same Bank @ Burst Length = 4
Note: 1. To Write data before burst read ends. DQM should be asserted three cycle prior to write command to avoid bus
Elite Semiconductor Memory Technology Inc.
2. Row precharge will interrupt writing. Last data input, t
3. DQM should mask invalid input data on precharge command cycle when asserting precharge before end of burst.
contention.
Input data after Row precharge cycle will be masked internally.
RDL
before row precharge, will be written.
Publication Date: Aug. 2009
Revision: 1.3
M52D128168A
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