m52d128168a Elite Semiconductor Memory Technology Inc., m52d128168a Datasheet - Page 24

• Manufacturer Part Number: m52d128168a
• Description: 2m X 16 Bit X 4 Banks Mobile Synchronous Dram
• Manufacturer: Elite Semiconductor Memory Technology Inc.

10. Clock Suspend Exit & Power Down Exit
11. Auto Refresh & Self Refresh
*Note:
Elite Semiconductor Memory Technology Inc.
I n t e r n a l
C L K
C K E
C M D
1. Active power down: one or more banks active state.
2. Precharge power down: all banks precharge state.
3. The auto refresh is the same as CBR refresh of conventional DRAM.
4. Before executing auto/self refresh command, all banks must be idle state.
5. MRS, Bank Active, Auto/Self Refresh, Power Down Mode Entry.
6. During self refresh entry, refresh interval and refresh operation are performed internally.
CM D
C L K
C K E
CM D
C L K
C K E
C L K
No precharge commands are required after auto refresh command.
During t
After self refresh entry, self refresh mode is kept while CKE is low.
During self refresh entry, all inputs expect CKE will be don’t cared, and outputs will be in Hi-Z state.
For the time interval of t
4K cycles of burst auto refresh is required immediately before self refresh entry and immediately after self refresh exit.
1 ) C l o c k S u s p e n d ( = A c t i v e P o w e r D o w n ) E x i t
2 ) S e l f R e f r e s h
1 ) A u t o R e f r e s h & S e l f R e f r e s h
* N o t e 1
RFC
P R E
P R E
from auto refresh command, any other command can not be accepted.
* N o t e 4
* N o t e 4
t
t
R P
R P
* N o t e 6
RFC
from self refresh exit command, any other command can not be accepted.
t
A R
S S
S R
* N o t e 3
R D
t
R F C
I n t e r n a l
C K E
C M D
C L K
C L K
CM D
t
2 ) P o w e r D o w n ( = P r e c h a r g e P o w e r D o w n )
R F C
* N o t e 2
* N o t e 5
C M D
N O P
t
Publication Date: Aug. 2009
Revision: 1.3
S S
A C T
M52D128168A
24/48