SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 127

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SDA9410-B13

Manufacturer Part Number
SDA9410-B13
Description
Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Manufacturer
MICRONAS [Micronas]
Datasheet
SDA9410
5.13.4
Default values are underlined.
127
Sub address 00
Bit
D7...D5
D4
D3...D0
Sub address 01
Bit
D7...D0
Sub address 02
Bit
D7...D0
Sub address 03
Bit
D7...D5
Name
x
PLLMOFF Only for test purposes, do not use in normal mode
PLLMRA
Name
IPOSYM
Name
IPOSXM
Name
LEBORDM
Detailed description
Function
xxx
PLLM (Clock doubling):
1: off
0: on
Only for test purposes, do not use in normal mode
PLLM range, only for test purposes [PPLMRA=0]
Function
Vertical Picture Position in the Memory for Master Picture
resolution: 1 line
[IPOSYM=0] - upper position
Function
Horizontal Picture Position in the Memory for Master Picture
resolution: 4 pixel
[IPOSXM=0] - left position
Function
Amount of left border pixels by horizontal compression master:
4*LEBORDM [LEBORDM=0]
Preliminary Data Sheet
Micronas
I²C Bus

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