SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 157

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SDA9410-B13

Manufacturer Part Number
SDA9410-B13
Description
Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Manufacturer
MICRONAS [Micronas]
Datasheet
SDA9410
157
Sub address 52
Bit
D2
D1
D0
Sub address 53
Bit
D7...D6
D5...D4
D3
Name
VECDISON
THYON
RESMOV
Name
REFRPER Refresh Period of the Memory (REFRON=1; 50 Hz, 625 lines
MEMOP
MASTERON
Function
Display of vector estimation results in chrominance channel
1: on
0: off
If VECDISON is on, the I²C Bus parameter FILSEL can be used
to choose between different display modi:
FILSEL:
11: x-vector: v-component; y-vector: u-component
10: x-vector: u-component; y-vector: v-component
01: y-vector: u- and v-component
00: x-vector: u- and v-component
Time hysteresis for film mode detection on/off:
1: on (camera->film: 2*(MEMOHIST+1); film->camera:
(MEMOHIST+1)
0: off (2*(MEMOHIST+1))
Reset of film detection time hysteresis queue
1: Reset: MOVMO=0 (camera mode)
0: no reset
Function
standard)
11: ~4 ms
10: ~5.5 ms
01: ~7 ms
00: ~10 ms
Memory Operation Mode
11:not defined
10:MUP-Mode (Multi-Picture)
01:SSC-Mode (Split Screen)
00:SRC-Mode (Sample Rate Conversion)
Reading Data of Master Channel
1: enabled (master picture is displayed)
0: disabled
Preliminary Data Sheet
Micronas
I²C Bus

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