SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 58

no-image

SDA9410-B13

Manufacturer Part Number
SDA9410-B13
Description
Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Manufacturer
MICRONAS [Micronas]
Datasheet
SDA9410
Config.
Table 43
58
10
11
12
1
2
3
4
5
6
7
8
9
Mode
SRC
SRC
SRC
SRC
MUP
MUP
MUP
MUP
SSC
SSC
SSC
SSC
Applications of different data configurations
Application
motion compensated up conversion (4:1:1 or 4:2:0) + PIP (ABAB, frame based)
motion compensated up conversion with enlarged picture size, no PIP facility
AABB conversion for master and slave channel, slave data is written twice (PIP-
and SSC-configuration)
used during switching from configuration 1 to configuration 7 without artefacts
2 independent not synchronized full size channels, AABB conversion
joint line free ’Double Window’ / ’Split Screen’ / ’PAP’ display, AABB conversion
display of 2 live channels, AABB conversion
slave channel exceeds the maximum double window size
display of 2 live channels, AABB conversion
master channel exceeds the maximum double window size
2 independent not synchronized full size channels, AABB conversion
high resolution Multi Picture for master and slave channel (one live picture possible)
AABB conversion
high resolution Multi Picture for master channel,
reduced resolution Multi Picture for slave channel, AABB conversion
reduced resolution Multi Picture for master channel,
high resolution Multi Picture for slave channel, AABB conversion
reduced resolution Multi Picture for master and slave channel, AABB conversion
Application modes and memory concept
Preliminary Data Sheet
Micronas

Related parts for SDA9410-B13