SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 143

• Manufacturer Part Number: SDA9410-B13
• Description: Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
• Manufacturer: MICRONAS [Micronas]

SDA9410
143
D2...D1
D0
Sub address 2E
Bit
D7...D0
Sub address 2F
Bit
D7...D0
Sub address 30
Bit
D7...D0
NAPIPPHS
(LSBs of
NAPLIPS)
TWOINS
Name
NAPIPDLS
(MSBs of
NAPLIPS)
Name
ALPFS
Name
APPLS
Number of not active pixels from external HINS to the input data
in system clocks of CLKS:
Distance(HINS to input data) = (NAPIPDLS*4+NAPIPPHS+8)
[NAPIPPHS = 0]
Chrominance input format slave:
1: 2’s complement input (-128...127)
0: unsigned input (0...255)
inside the SDA 9410 the data are always processed as
unsigned data
Function
Number of not active pixels from HINS to the input data in
system clocks of CLKS:
Distance(HINS to input data) = (4 * NAPIPDLS + NAPIPPHS +
8) [NAPIPDLS= 0]
Function
Number of active lines per field after vertical compression slave:
Active lines = ALPFS * 2 [ALPFS=144]
Function
Number of active pixels per line in the input data stream after
horizontal expansion/compression in system clocks of CLKS:
Active pixels = APPLS*8 [APPLS = 180]
Preliminary Data Sheet
Micronas
I²C Bus