SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 60

• Manufacturer Part Number: SDA9410-B13
• Description: Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
• Manufacturer: MICRONAS [Micronas]

SDA9410
Table 47
5.6.3
Conditions:MEMOP=00, ORGMEMM=1, ORGMEMS=1
The described data configuration is typical for normal SRC mode with motion
compensated 100 Hz ABAB conversion and joint line free frame based PIP insertion.
5.6.4
Conditions: MEMOP=01 or 10, ORGMEMM=1, ORGMEMS=1
60
I²C Bus
parameter
[Default]
CHRFORM
[0)
CHRFORS
[0]
ORGMEMM
[1]
ORGMEMS
[1]
MEMOP
[00]
VERRESM
[0]
VERRESS
[0]
MEMWRM
[0]
MEMWRS
[0]
maximum picture size (master Channel) : 768 pixel X 288 lines
maximum picture size (slave channel) : 256 pixel X 104 lines
SRC mode configuration
SSC and MUP mode configuration
Input write I²C Bus parameter
Sub address
12h
34h
58h
57h
53h
58h
57h
58h
57h
Description
Chrominance data format master channel
Chrominance data format slave channel
Data configuration of the memory master channel
Data configuration of the memory slave channel
Memory operation mode
Vertical resolution master channel
Vertical resolution slave channel
Memory write mode master channel
Memory write mode slave channel
Application modes and memory concept
Preliminary Data Sheet
Micronas