SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 30
SDA9410-B13
Manufacturer Part Number
SDA9410-B13
Description
Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Manufacturer
MICRONAS [Micronas]
Datasheet
1.SDA9410-B13.pdf
(179 pages)
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SDA9410
5.4
The Figure 12 shows a detailed block diagram of the input processing blocks. The input
signal can be vertically and horizontally compressed or horizontally expanded by a large
number of factors. Furthermore the input signal can be processed by different noise
reduction algorithms to reduce the noise in the signal. The noise measurement block
determines the noise level of the input signal. The letter box detection block finds the
start and end line of letter box pictures. The information can be used by a µC to calculate
zooming factors and to control the IC for resizing the picture for a full screen display on
16:9 tubes.
Figure 12
The different blocks and the corresponding I²C Bus parameters will be described now in
more detail.
30
UVINM
UVINS
YINM
DELM
YINS
detection
Letter
box
Input signal processing
DELS
Delay
-3/+4
Delay
-3/+4
Block diagram of input processing blocks
NMLINE, NMALG NOISEME
Noise
measurement
memories
memories
Line
Line
MASTER
compression/
compression/
Vertical and
SLAVE
Vertical and
expansion
horizontal
expansion
horizontal
Spatial noise
SNRON
reduction
NRON
Temporal
reduction
Input signal processing
noise
Preliminary Data Sheet
YM from Memory
YM to Memory
CM from Memory
YS to Memory
CM to Memory
CS to Memory
Micronas
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