SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 161
SDA9410-B13
Manufacturer Part Number
SDA9410-B13
Description
Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Manufacturer
MICRONAS [Micronas]
Datasheet
1.SDA9410-B13.pdf
(179 pages)
- Current page: 161 of 179
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SDA9410
161
Sub address 58
Bit
D3
D2
D1
D0
Sub address 59
Bit
D7...D4
D3...D0
Name
FREEZEM Freeze Picture Master
WRFLDM
ORGMEMM
VERRESM
Name
MEMMNDTH
MENVRTH
Function
1: freezed (no writing of master data)
0: live
Write Field Master Channel (only MUP Mode)
1: only A fields are written
0: all fields are written corresponding on actual mode
Data Configuration of the Memory (Master Channel)
1:2 fields (restricted picture size in SSC- and MUP-Mode)
0:1 field
Vertical Resolution Master Channel (MUP Mode)
(ORGMEMM=1 and WRFLDM=1)
1: frame resolution
0: field resolution
Function
Threshold for switching between the vector activity or the field
difference as input for the film mode detection
Use field difference as film mode detection input
1111: insensible to motion
:
0001: sensible to motion
0000: use vector activity as film mode detection input
Null vector reliability threshold, makes detection of null vector in
homegenous areas more reliable. Threshold value to adjust
sensibility of null vector reliability:
1111: insensible
:
0001: sensible to motion and noise
0000: off
Preliminary Data Sheet
Micronas
I²C Bus
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