SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 134

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SDA9410-B13

Manufacturer Part Number
SDA9410-B13
Description
Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Manufacturer
MICRONAS [Micronas]
Datasheet
SDA9410
134
Sub address 14
Bit
D7...D6
D5...D1
D0
Sub address 15
Bit
D7...D4
D3...D0
Sub address 16
Bit
D7...D4
D3...D0
Name
x
NMLINE
NMALG
Name
TNRCLY
TNRCLC
Name
TNRKOY
TNRKOC
Function
xx
Line for noise measurement (only valid for NMALG=1) [NMLINE
= 4]
Noise measurement algorithm:
1: measurement during vertical blanking period (line can be
defined by NMLINE)
0: measurement in the active picture
Function
Temporal noise reduction of luminance: classification
1111: slight noise reduction
:
0000: strong noise reduction
Temporal noise reduction of chrominance: classification
1111: slight noise reduction
:
0000: strong noise reduction
Function
Temporal noise reduction of luminance:
Vertical shift of the motion detector characteristic [TNRKOY=0]
Temporal noise reduction of chrominance:
Vertical shift of the motion detector characteristic [TNRKOC=0]
Preliminary Data Sheet
Micronas
I²C Bus

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