SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 147
SDA9410-B13
Manufacturer Part Number
SDA9410-B13
Description
Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Manufacturer
MICRONAS [Micronas]
Datasheet
1.SDA9410-B13.pdf
(179 pages)
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SDA9410
147
Sub address 3E
Bit
D7
D6...D0
Sub address 3C
Bit
D7...D0
Sub address 3D
Bit
D7...D0
Sub address 3F
Bit
D7...D0
Name
x
HORWIDTHM
Name
VERPOSM
Name
VERPOSS Number of lines from the first active line of the main channel to
Name
HORWIDTHS
Function
Number of lines from the first active line of the main channel to
the first active line of the master channel per output frame:
Number of lines = VERPOSM [VERPOSM = 0]
Function
the first active line of the slave channel per output frame:
Number of lines = VERPOSS [VERPOSS = 0]
Function
Number of active pixels per line of the slave channel in system
clocks of X1/CLKD:
Active pixels = 4 * HORWIDTHS [HORWIDTHS = 180]
Function
x
Number of active pixels per line of the master channel in
system clocks of X1/CLKD:
Active pixels = 8 * HORWIDTHM [HORWIDTHM = 90]
Preliminary Data Sheet
Micronas
I²C Bus
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