SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 61

• Manufacturer Part Number: SDA9410-B13
• Description: Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
• Manufacturer: MICRONAS [Micronas]

SDA9410
This is the typical configuration needed for joint line free ’Split Screen’ / ’Double Window’
or ’PAP’ display in 4:1:1 or 4:2:0 format using AABB conversion. The same configuration
can be used for Multi Picture mode displaying a joint line free live picture and multiple
high resolution still pictures.
In MUP-Mode it is possible to write only A fields into the memory. Therefore the I²C Bus
parameters
WRFLDM and WRFLDS can be used.
Table 48
Table 49
5.6.5
This chapter deals with the switching between the different operation modes without
causing visible picture artifacts. The typical application concerns the transition from
SRC-PIP mode to SSC double window mode (see figure 26 on page 63 and figure 27
on page 64) and furthermore to an exchange of master and slave channel (see figure
28 on page 65).
61
I²C Bus
parameter
[Default]
WRFLDM
[0]
WRFLDS
[0]
WRFLDM /
WRFLDS
1
0
maximum picture size (master and slave) : 512 (768) pixel X 256 (170) lines
Configuration switch
Definition of WRFLDM/WRFLDS
Input write I²C Bus parameter
Write field
(MUP-Mode, MEMOP=10)
only A fields are written
all fields are written corresponding to the actual mode
Sub address
58h
57h
Description
Write field master channel (MUP-Mode)
Write field slave channel (MUP-Mode)
Application modes and memory concept
Preliminary Data Sheet
Micronas