SDA9410-B13 MICRONAS [Micronas], SDA9410-B13 Datasheet - Page 148
SDA9410-B13
Manufacturer Part Number
SDA9410-B13
Description
Display Processor and Scan Rate Converter using Embedded DRAM Technology Units
Manufacturer
MICRONAS [Micronas]
Datasheet
1.SDA9410-B13.pdf
(179 pages)
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SDA9410
148
Sub address 40
Bit
D7
D6...D0
Sub address 41
Bit
D7...D0
Sub address 42
Bit
D7...D0
Sub address 43
Bit
D7
D6...D0
Name
VERWIDTHM
Name
VERWIDTHS
Name
BLANDEL Number of pixels from external HOUT to the active edge of the
Name
APPLOPD Number of active pixels per line (including coloured border
Function
x
Number of active lines per field of the master channel per output
frame:
Active lines = 8 * VERWIDTHM [VERWIDTHM = 72]
Function
Number of active lines per field of the master channel per output
frame:
Active lines = 4 * VERWIDTHS [VERWIDTHS = 144]
Function
BLANK signal in system clocks of X1/CLKD:
Number of pixels = (8 * (BLANDEL div 4) + BLANDEL
mod 3) [BLANDEL = 0]
Function
x
values and data) in the output data stream in system clocks of
X1/CLKD:
Active pixels = 8 * APPLOPD [APPLOPD = 90]
Preliminary Data Sheet
Micronas
I²C Bus
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