FWIXEPAD0SE001 INTEL [Intel Corporation], FWIXEPAD0SE001 Datasheet - Page 11

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FWIXEPAD0SE001

Manufacturer Part Number
FWIXEPAD0SE001
Description
Advanced 8-Port 10/100 Mbps PHY Transceivers
Manufacturer
INTEL [Intel Corporation]
Datasheet
Datasheet
Document Number: 249241
Revision Number: 007
Revision Date: August 28, 2003
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Description
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Section 4.3.7, “MDIO Management
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Section 4.6.1.4, “Link
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Enabled in Forced Speed
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Sense/Data Valid
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Functions”.
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Band
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Signaling”.
Section 4.11.5, “DTE Discovery Behavior”
Section 4.13, “Cable Diagnostics
Table 42 “Intel® LXT9785/9785E Global Hardware Configuration
Section 4.3.11, “FIFO Initial Fill Values”
(RMII)”.
Section 4.3.8, “MII
Section 4.9.3.7, “Fiber PMD
Section 4.11.2, “Interaction between Processor, MAC, and
Section 4.3.6, “MII
Section 4.10.4,
Criteria”:
Section 4.5.4,
Section 4.5.3.1, “Global (Hardware) Power
Mode”.
Section 4.9.3.6.3, “Polarity
Section 4.3.2, “Internal
Section 4.10.1, “Preamble
Section 4.13.3, “Implementation
Section 4.6.1.6, “Reliable Link Establishment While Auto MDI/MDIX is
Revision Date: August 28, 2003
Section 4.11, “DTE Discovery
Section 4.4.1, “Power
Section 4.6.1.5, “Parallel
Section 4.9.3.7.1, “Far End Fault
Revision Number: 007
Section 4.7.4.3, “Receive
Section 4.11.4, “DTE Discovery Process
Interface”:
“Jabber”.
Section 4.8, “RMII Operation”
Sectionalization”.
Isolate”.
“Reset”.
Overview”.
Section 4.6.1.2, “Manual Next Page
Section 4.9.3.4, “Carrier Sense
Sublayer”.
Loopback”.
Section 4.12.2, “Per-Port LED Driver
Handling”.
Correction”.
Requirements”.
Section 4.5.3, “Power-Down
Detection”.
Error”.
Considerations”.
Process”.
Indications”.
Down”.
Settings”.
Section 4.9.3.3, “Carrier
Flow”.
Section 4.12.3, “Out-of-
PHY”.
(SMII)”.
Exchange”.
Mode”.
Contents
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