FWIXEPAD0SE001 INTEL [Intel Corporation], FWIXEPAD0SE001 Datasheet - Page 213

• Manufacturer Part Number: FWIXEPAD0SE001
• Description: Advanced 8-Port 10/100 Mbps PHY Transceivers
• Manufacturer: INTEL [Intel Corporation]

Datasheet
Document Number: 249241
Revision Number: 007
Revision Date: August 28, 2003
Table 98. RMII Out-of-Band Signaling Register (Address 25, Hex 19)
NOTE: The BGA15 package does not support RMII operation.
1. R/W = Read/Write
15:0
15:7
6:4
3:1
Bit
0
Name
Reserved for
BGA15
Reserved
BIT1
BIT0
PROGRMII
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
Description
Write as 0, ignore on Read.
Write as 0, ignore on Read
These three bits select which status information is
available on the RxData(1) bit of the RMII bus.
000 = Link
001 = Speed
010 = Duplex
011 = Auto-negotiation complete
100 = Polarity reversed
101 = Jabber detected
110 = Interrupt pending
111 = Reserved
These three bits select which status information is
available on the RxData(0) bit of the RMII bus.
000 = Link
001 = Speed
010 = Duplex
011 = Auto-negotiation complete
100 = Polarity reversed
101 = Jabber detected
110 = Interrupt pending
111 = Reserved
0 = Disable Out-of-Band signaling.
1 = Enable programmable RMII Out-of-Band
Note: Out-of-Band signaling is disabled when the
Isolate mode is enabled by setting Register bit 0.10.
signaling. When enabled, Register bits 6:1 specify
which status bits are available on the RMII
RxData data bus.
PQFP and BGA23
BGA15
Type
R/W
R/W
R/W
R/W
R/W
1
Default
0x0000
0x000
000
000
0
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