FWIXEPAD0SE001 INTEL [Intel Corporation], FWIXEPAD0SE001 Datasheet - Page 196

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FWIXEPAD0SE001

Manufacturer Part Number
FWIXEPAD0SE001
Description
Advanced 8-Port 10/100 Mbps PHY Transceivers
Manufacturer
INTEL [Intel Corporation]
Datasheet
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
198
Figure 61. Intel
Table 80. Intel
Figure 62. Intel
Table 81. Intel
Voltage Threshold
Power-up recovery time
Software power-down
Reset pulse width
Reset recovery delay
1. Typical values are at 25° C and are for design aid only; not guaranteed and not subject to production
2. The minimum time required between bringing up consecutive ports powered down by Register bit 0.11, or
1. Typical values are at 25° C and are for design aid only; not guaranteed and not subject to production
testing.
a software or hardware reset.
testing.
®
®
®
®
LXT9785/LXT9785E Power-Up Timing Parameters
LXT9785/LXT9785E Reset Recovery Timing Parameters
LXT9785/LXT9785E Power-Up Timing
LXT9785/LXT9785E Reset Recovery Timing
Parameter
Parameter
2
MDIO,etc
RESET
MDIO,etc
tRcdly
t
VCC
Sym
Sym
t
SPDR
tPW
PDR
v1
Min
100
Min
2.1
20
0.4
10
Typ
Typ
v1
1
1
tPDR
tPW
Max
Max
Units
ms
ms
V
Units
ms
ns
Revision Date: August 28, 2003
tRcdly
Document Number: 249241
Test Conditions
Test Conditions
Revision Number: 007
Datasheet

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