FWIXEPAD0SE001 INTEL [Intel Corporation], FWIXEPAD0SE001 Datasheet - Page 63

• Manufacturer Part Number: FWIXEPAD0SE001
• Description: Advanced 8-Port 10/100 Mbps PHY Transceivers
• Manufacturer: INTEL [Intel Corporation]

Datasheet
Document Number: 249241
Revision Number: 007
Revision Date: August 28, 2003
Signal
No Ball
No Ball
No Ball
No Ball
PAUSE
PREASEL
PWRDWN
REFCLK0
REFCLK1
RESET
RxData0
RxData1
RxData2
RxData3
RxData4
RxData5
RxData6
RxData7
SD_2P5V
SD0
SD1
SD2
SD3
SD4
SD5
SD6
SD7
SECTION
SGND
SYNC0
SYNC1
TCK
TDI
TDO
TMS
TPFIN0
TPFIN1
LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
Ball Type
M11 –
M12 –
N10 –
M15 I, ST, IP
C15 O, TS
N17 I
C16 I, ID
M16 I, ST, ID
N14 I, ST, IP
N15 O, TS
N16 I, ST, IP
L14 I, ST, ID
E12 I
A13 O, TS
B14 O, TS
E16 O, TS
P15 I
P16 I
P17 I
L15 I, ST, ID
K14 –
N8
D5
D7
C2
D9
N4
N5
E6
A3
B6
P1
P2
P3
A6
T1
T4
–
O, TS, SL,
ID, I, ST
O, TS, SL,
ID, I, ST
I
O, TS
O, TS
O, TS
O, TS
I, ST, ID
I
I
I
I
I, ID
AO/AI
AO/AI
1
Reference for
Full Description
–
–
–
–
Table 32 (page 90)
Table 24 (page 82)
Table 32 (page 90)
Table 24 (page 82)
Table 24 (page 82)
Table 32 (page 90)
Table 24 (page 82)
Table 24 (page 82)
Table 24 (page 82)
Table 24 (page 82)
Table 24 (page 82)
Table 24 (page 82)
Table 24 (page 82)
Table 24 (page 82)
Table 29 (page 88)
Table 29 (page 88)
Table 29 (page 88)
Table 29 (page 88)
Table 29 (page 88)
Table 29 (page 88)
Table 29 (page 88)
Table 29 (page 88)
Table 29 (page 88)
Table 32 (page 90)
Table 34 (page 95)
Table 24 (page 82)
Table 24 (page 82)
Table 31 (page 89)
Table 31 (page 89)
Table 31 (page 89)
Table 31 (page 89)
Table 30 (page 88)
Table 30 (page 88)
Signal
TPFIN2
TPFIN3
TPFIN4
TPFIN5
TPFIN6
TPFIN7
TPFIP0
TPFIP1
TPFIP2
TPFIP3
TPFIP4
TPFIP5
TPFIP6
TPFIP7
TPFON0
TPFON1
TPFON2
TPFON3
TPFON4
TPFON5
TPFON6
TPFON7
TPFOP0
TPFOP1
TPFOP2
TPFOP3
TPFOP4
TPFOP5
TPFOP6
TPFOP7
TRST
TxData0
TxData1
TxData2
TxData3
TxData4
TxData5
TxData6
M17 I, ST, IP
Ball Type
T12 AO/AI
T13 AO/AI
T16 AO/AI
U13 AO/AI
R12 AO/AI
R16 AO/AI
R10 AO/AI
U11 AO/AI
U15 AO/AI
T15 AO/AI
T10 AO/AI
T14 AO/AI
R14 AO/AI
A11 I, ID
B13 I, ID
D13 I, ID
T11 AO/AI
R8
U9
R2
U3
R6
U1
R4
U5
U7
T5
T8
T9
T7
T2
T3
T6
E2
C3
B5
D8
AO/AI
AO/AI
AO/AI
AO/AI
AO/AI
AO/AI
AO/AI
AO/AI
AO/AI
AO/AI
AO/AI
AO/AI
AO/AI
AO/AI
AO/AI
AO/AI
I, ID
I, ID
I, ID
I, ID
1
Reference for
Full Description
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 30 (page 88)
Table 31 (page 89)
Table 24 (page 82)
Table 24 (page 82)
Table 24 (page 82)
Table 24 (page 82)
Table 24 (page 82)
Table 24 (page 82)
Table 24 (page 82)
65