FWIXEPAD0SE001 INTEL [Intel Corporation], FWIXEPAD0SE001 Datasheet - Page 140

• Manufacturer Part Number: FWIXEPAD0SE001
• Description: Advanced 8-Port 10/100 Mbps PHY Transceivers
• Manufacturer: INTEL [Intel Corporation]

LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
4.8.2
4.8.3
4.8.4
4.8.5
4.8.6
142
Figure 24. Intel
Transmit Enable
TxENn must be asserted and de-asserted synchronously with REFCLK. The MAC must assert
TxENn at the same time as the first nibble of preamble. TxENn must be de-asserted after the last
bit of the packet.
Carrier Sense & Data Valid
The LXT9785/LXT9785E asserts CRS_DVn when it detects activity on the line. However,
RxDatan outputs zeros until the received data is decoded and available for transfer to the controller.
Receive Error
Whenever the LXT9785/LXT9785E receives an error symbol from the network, it asserts RxERn.
When it detects a bad Start-of-Stream Delimiter (SSD) it drives a “10” jam pattern on the RxData
pins to indicate a false carrier event.
Out-of-Band Signaling
The LXT9785/LXT9785E has the capability of encoding status information in the RxData stream
during IPG.
4B/5B Coding Operations
The 100BASE-X protocol specifies the use of a 5-bit symbol code on the network media. However,
data is normally transmitted across the RMII interface in 2-bit nibblets or “di-bits”. The LXT9785/
LXT9785E incorporates a parallel/serial converter that translates between di-bit pairs and 4-bit
nibbles, and a 4B/5B encoder/decoder circuit that translates between 4-bit nibbles and 5-bit
symbols for the 100BASE-X connection.
symbols.
D0
D1
Reduced MII Mode Data Flow
di-bit
pairs
®
D2
D3
LXT9785/LXT9785E RMII Data Flow
Table 46 on page 147
See “Monitoring Operations” on page 157
Parallel
Parallel
Serial
Serial
to
to
D0 D1 D2 D3
nibbles
4-bit
shows 4B/5B symbol coding (not all symbols are valid).
4B/5B
Figure 24
S0 S1 S2 S3 S4
shows the data conversion flow from nibbles to
symbols
5-bit
for details.
Scramble
Scramble
De-
Revision Date: August 28, 2003
MLT3
Document Number: 249241
pattern: 0, +1, 0, -1, 0, +1...
Revision Number: 007
All transitions must follow
0
No Transition = 0.
Transition = 1.
+1
Datasheet
0
-1
0