FWIXEPAD0SE001 INTEL [Intel Corporation], FWIXEPAD0SE001 Datasheet - Page 144

• Manufacturer Part Number: FWIXEPAD0SE001
• Description: Advanced 8-Port 10/100 Mbps PHY Transceivers
• Manufacturer: INTEL [Intel Corporation]

LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
146
Figure 28. Intel
4.9.2.1.1 Preamble Handling
When the MAC asserts TxEN, the PCS substitutes a /J/K/ symbol pair, also known as the Start-of-
Stream Delimiter (SSD), for the first two nibbles received across the RMII. The PCS layer
continues to encode the remaining RMII data until TxEN is de-asserted (see Table 46 on page 147).
It then returns to supplying IDLE symbols to the line driver.
The PCS layer performs the opposite function in the receive direction by substituting two preamble
nibbles for the SSD.
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Sublayer
Sublayer
Sublayer
LXT9785/LXT9785E Protocol Sublayers
PMA
PMD
PCS
LXT9785
De-scrambler
Scrambler/
100BASE-TX
Serializer/De-serializer
Link/Carrier Detect
Encoder/Decoder
MII Interface
Fiber Transceiver
100BASE-FX
LVPECL Interface
Revision Date: August 28, 2003
Document Number: 249241
Revision Number: 007
Datasheet