ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 108

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ISP1362EE/01

Manufacturer Part Number
ISP1362EE/01
Description
Single-chip Universal Serial Bus On-The-Go controller
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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15.9.5 HcATLPTDSkipMap register (R/W: 1CH/9CH)
15.9.6 HcATLLastPTD register (R/W: 1DH/9DH)
15.9.7 HcATLCurrentActivePTD register (R: 1EH)
Table 98:
This is a 32-bit register, and the bit description is given in
register represents the first PTD stored in the ATL buffer, bit 1 represents the second
PTD stored in the buffer, and so on. When the bit is set by the HCD, the
corresponding PTD is skipped and is not processed by the HC. The HC processes
the skipped PTD only if the HCD has reset its corresponding skipped bit to logic 0.
Clearing the corresponding bit in the HcATLPTDSkipMap register when there is no
valid data in the block will cause unpredictable behavior of the HC.
Code (Hex): 1C — read
Code (Hex): 9C — write
Table 99:
This is a 32-bit register.
register represents the first PTD stored in the ATL buffer, bit 1 represents the second
PTD stored in the buffer, and so on. The bit that is set to logic 1 by the HCD is used
as an indication to the HC that its corresponding PTD is the last PTD stored in the
ATL buffer. When the processing of the last PTD is complete, the HC loops back to
process the first PTD stored in the buffer.
Code (Hex): 1D — read
Code (Hex): 9D — write
Table 100: HcATLLastPTD register: bit description
This register indicates which PTD stored in the ATL buffer is currently active and is
updated by the HC. The HCD can use it as a buffer pointer to decide which PTD
locations are currently free for filling in new PTDs to the buffer. This indication helps
to prevent the HCD from accidentally writing into the currently active PTD buffer
location.
Code (Hex): 1E — read only
Bit
31 to 0
Bit
31 to 0 SkipBits
Bit
31 to 0
Symbol
[31:0]
Symbol
LastPTD
Bits[31:0]
Table 101
Symbol
PTDDone
Bits[31:0]
HcATLPTDDoneMap register: bit description
HcATLPTDSkipMap register: bit description
Rev. 03 — 06 January 2004
Access Value
R/W
shows the bit allocation of the register.
Access Value
R/W
Access Value
R
Table 100
0000H
0000H 0 — The PTD is not the last PTD stored in the
0000H
gives the bit description of the register. Bit 0 of the
Description
buffer.
1 — The PTD is the last PTD stored in the buffer.
Description
0 — The HC processes the PTD.
1 — The HC skips processing the PTD.
Description
0 — The PTD stored in the ATL buffer was not
successfully processed by the HC.
1 — The PTD stored in the ATL buffer was
successfully processed by the HC.
Single-chip USB OTG controller
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Table
99. Bit 0 of the
ISP1362
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