ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 115

• Manufacturer Part Number: ISP1362EE/01
• Description: Single-chip Universal Serial Bus On-The-Go controller
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Table 114: DcHardwareConfiguration register: bit allocation
9397 750 12337
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
reserved
DAKOLY
R/W
15
7
0
-
-
16.1.4 DcHardwareConfiguration register (R/W: BBH/BAH)
DRQPOL
Table 113: DcMode register: bit description
This command is used to access the DcHardwareConfiguration register, which
consists of two bytes. The first (lower) byte contains the device configuration and
control values, the second (upper) byte holds the clock control bits and the clock
division factor. The bit allocation is given in
of the programmed bit values.
The DcHardwareConfiguration register controls the connection to the USB bus, clock
activity and power supply during the ‘suspend’ state, as well as output clock
frequency, DMA operating mode and pin configurations (polarity, signalling mode).
Code (Hex): BA/BB — write or read DcHardwareConfiguration register
Transaction — write or read 2 bytes (code or data)
EXTPUL
Bit
7 to 6
5
4
3
2
1
0
R/W
R/W
14
0
6
1
Symbol
-
GOSUSP
-
INTENA
DBGMOD
-
SOFTCT
NOLAZY
DAKPOL
R/W
R/W
13
1
5
0
Rev. 03 — 06 January 2004
CLKRUN
reserved
Description
reserved
Writing logic 1 followed by logic 0 will activate the ‘suspend’
mode.
reserved
Logic 1 enables all interrupts. Bus reset value: unchanged.
Logic 1 enables debug mode, in which all NAKs and errors will
generate an interrupt. Logic 0 selects normal operation, in which
interrupts are generated on every ACK (bulk endpoints) or after
every data transfer (isochronous endpoints). Bus reset value:
unchanged.
reserved
Logic 1 enables SoftConnect. This bit is ignored if EXTPUL = 1
in the DcHardwareConfiguration register (see
reset value: unchanged.
Remark: In the OTG mode, this bit is ignored. The LOC_CONN
bit of the OtgControl register controls the pull-up resistor on the
OTG_DP1 pin.
R/W
12
0
4
0
-
WKUPCS
R/W
R/W
11
0
3
0
Table
114. A bus reset will not change any
reserved
Single-chip USB OTG controller
R/W
R/W
10
0
2
1
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
CKDIV[3:0]
INTLVL
R/W
R/W
9
1
1
0
ISP1362
Table
114). Bus
INTPOL
115 of 150
R/W
R/W
8
1
0
0