ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 110

• Manufacturer Part Number: ISP1362EE/01
• Description: Single-chip Universal Serial Bus On-The-Go controller
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Table 105: HcATLPTDDoneThresholdTimeOut register: bit allocation
16. Device Controller (DC) registers
9397 750 12337
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
R/W
15
7
0
-
-
the Hc PInterrupt register) to indicate a time-out situation, provided
HcATLPTDDoneMap is currently 0x0000 0000.
the HcATLPTDDone register.
Remark: If the time-out indication is not required by software, or there is no active
PTD in the ATL buffer, write 0x0000 to this register.
Code (Hex): 52 — read
Code (Hex): D2 — write
Table 106: HcATLPTDDoneThresholdTimeOut register: bit description
The functions and registers of the DC are accessed using commands, which consist
of a command code followed by optional data bytes (read or write action). An
overview of the available commands and registers is given in
A complete access consists of two phases:
The following applies to a register or buffer memory access in the 16-bit bus mode:
Bit
15 to 8
7 to 0
•
•
1. Command phase: when address pin A0 = HIGH, the DC interprets the data on
2. Data phase (optional): when address pin A0 = LOW, the DC transfers the data
R/W
The upper byte (bits D15 to D8) in the command phase or the undefined byte in
the data phase are ignored.
The access of registers is word-aligned: byte access is not allowed.
14
6
0
-
-
the lower byte of the bus (bits D7 to D0) as a command code. Commands without
a data phase are immediately executed.
on the bus to or from a register or endpoint buffer memory. In case of multi-byte
registers, the least significant byte or word are accessed first.
Symbol
-
PTDDoneTimeOut[7:0]
R/W
13
5
0
-
-
Rev. 03 — 06 January 2004
PTDDoneTimeOut[7:0]
R/W
12
4
0
-
-
reserved
Description
reserved
Maximum allowable time in ms for the HC to retry a
transaction with NAK returned.
R/W
11
3
0
-
-
Table 105
Single-chip USB OTG controller
R/W
10
2
0
-
-
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
shows the bit allocation of
Table
R/W
9
1
0
-
-
107.
ISP1362
110 of 150
R/W
8
0
1
-
-