ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 11

• Manufacturer Part Number: ISP1362EE/01
• Description: Single-chip Universal Serial Bus On-The-Go controller
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Table 2:
9397 750 12337
Product data
Symbol
H_PSW2
DGND
CLKOUT
GL
V
H_OC2
H_OC1
X1
X2
OTGMODE
H_DM2
H_DP2
ID
OTG_DM1
OTG_DP1
CC
[1]
Pin description
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
LQFP64
Pin
…continued
G9
G10
F9
F10
E9
E10
D9
D10
C9
C10
B9
B10
A10
A9
B8
TFBGA64
Ball
Type
O
-
O
O
-
I
I
AI
AO
I
AI/O
AI/O
I
AI/O
AI/O
[2]
Rev. 03 — 06 January 2004
Description
connects to the external PMOS switch
LOW — switches ON the PMOS providing V
port
HIGH — switches OFF the PMOS
when not in use, leave this pin open
open-drain output
digital ground
programmable clock output; the default clock frequency is 12 MHz and
can be varied from 3 MHz to 48 MHz
push-pull output
GoodLink LED indicator output; the LED is OFF by default, blinks ON
upon USB traffic
open-drain output; 4 mA
supply voltage (3.3 V); it is recommended to connect a decoupling
capacitor of 0.01 F
overcurrent sense input for downstream port 2; both the digital and
analog overcurrent inputs can be used for port 2, depending on the
hardware mode register setting; when not in use, it is recommended to
connect this pin to the V
overcurrent sensing input for downstream port 1; both the digital and
analog overcurrent inputs can be used for port 1, depending on the
hardware mode register setting; when not in use, it is recommended to
connect this pin to the V
crystal input; connected directly to a 12 MHz crystal; when this pin is
connected to an external clock oscillator, leave pin X2 open
crystal output; connected directly to a 12 MHz crystal; when pin X1 is
connected to an external clock oscillator, leave this pin open
to select whether port 1 is operating in the OTG or non-OTG mode;
see
input with hysteresis
downstream D signal; host only, port 2; when not in use, leave this
pin open and set bit ConnectPullDown_DS2 of the
HcHardwareConfiguration register
downstream D+ signal; host only, port 2; when not in use, leave this
pin open and set bit ConnectPullDown_DS2 of the
HcHardwareConfiguration register
input pin for sensing OTG ID; the status of this input pin is reflected in
the OTGStatus register (bit 0); see
input with hysteresis
D signal of the OTG port, the downstream host port 1 or the
upstream device port; when not in use, leave this pin open and set
bit ConnectPullDown_DS1 of the HcHardwareConfiguration register
D signal of the OTG port, the downstream host port 1 or the
upstream device port; when not in use, leave this pin open and set
bit ConnectPullDown_DS1 of the HcHardwareConfiguration register
Table 8
DD_5V
DD_5V
pin
pin
Single-chip USB OTG controller
Table 8
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
BUS
to the downstream
ISP1362
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