ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 69

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ISP1362EE/01

Manufacturer Part Number
ISP1362EE/01
Description
Single-chip Universal Serial Bus On-The-Go controller
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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Philips Semiconductors
15. HC registers
Table 34:
9397 750 12337
Product data
Command (Hex)
Read
00
01
02
03
04
05
0D
0E
0F
11
12
13
14
15
16
20
21
22
24
25
HC Control registers summary
Write
N/A
81
82
83
84
85
8D
8E
8F
91
92
93
94
95
96
A0
A1
A2
A4
A5
Register
HcRevision
HcControl
HcCommandStatus
HcInterruptStatus
HcInterruptEnable
HcInterruptDisable
HcFmInterval
HcFmRemaining
HcFmNumber
HcLSThreshold
HcRhDescriptorA
HcRhDescriptorB
HcRhStatus
HcRhPortStatus[1]
HcRhPortStatus[2]
HcHardwareConfiguration
HcDMAConfiguration
HcTransferCounter
Hc PInterrupt
Hc PInterruptEnable
The HC contains a set of on-chip control registers. These registers can be read or
written by the HC Driver (HCD). The Control and Status register set, the Frame
Counter register set and the Root Hub register set are grouped under the category of
HC operational registers (32 bits). These operational registers are made compatible
to Open Host Controller Interface (OpenHCI) operational registers. This enables the
OpenHCI HCD to be ported easily to the ISP1362.
Reserved bits may be defined in future releases of this specification. To ensure
interoperability, the HCD that does not use a reserved field must not assume that the
reserved field contains logic 0. Furthermore, the HCD must always preserve the
values of the reserved field. When a R/W register is modified, the HCD must first read
the register, modify the desired bits and then write the register with the reserved bits
still containing the read value. Alternatively, the HCD can maintain an in-memory
copy of previously written values that can be modified and then written to the
HC register. When there is a write to set or clear the register, bits written to reserved
fields must be logic 0.
As shown in
these operational registers (32-bit registers) are similar to those defined in the OHCI
specification. The addresses, however, are equal to offset divided by 4.
Table
Rev. 03 — 06 January 2004
34, the offset locations (the commands for reading registers) of
Width
32
32
32
32
32
32
32
32
32
32
32
32
32
32
32
16
16
16
16
16
Reference
Section 15.1.1 on page 71
Section 15.1.2 on page 71
Section 15.1.3 on page 73
Section 15.1.4 on page 74
Section 15.1.5 on page 75
Section 15.1.6 on page 76
Section 15.2.1 on page 78
Section 15.2.2 on page 79
Section 15.2.3 on page 80
Section 15.2.4 on page 81
Section 15.3.1 on page 82
Section 15.3.2 on page 84
Section 15.3.3 on page 85
Section 15.3.4 on page 87
Section 15.3.4 on page 87
Section 15.4.1 on page 92
Section 15.4.2 on page 94
Section 15.4.3 on page 95
Section 15.4.4 on page 95
Section 15.4.5 on page 97
Single-chip USB OTG controller
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Functionality
HC Control and Status
registers
HC Frame Counter
registers
HC Root Hub registers
HC DMA and Interrupt
Control registers
ISP1362
69 of 150

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