ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 26

• Manufacturer Part Number: ISP1362EE/01
• Description: Single-chip Universal Serial Bus On-The-Go controller
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
9397 750 12337
Product data
9.6.1 Configuring registers for a DMA transfer
9.6 Setting up a DMA transfer
Remark: The HcTransferCounter register counts the number of bytes even though
the transfer is in number of words. Therefore, the transfer counter should be set to
word_size
ISP1362 to go into an indeterminate state.
The buffer memory access using indirect addressing always starts from the location 0
of each buffer area. Only the front portion of the memory (example: first 64 bytes of a
1024 bytes buffer) can be accessed. Therefore, to access a portion of the memory
that does not start from memory location 0, all memory locations before that location
must be accessed in a sequential order. The method is similar to the sequential file
access method.
The ISP1362 uses two DMA channels to individually serve the HC and the DC. The
DMA transfer allows the system CPU to work on other tasks while the DMA controller
transfers data to or from the ISP1362. The DMA slave controller, in the ISP1362, is
compatible with the 8327 type DMA controller.
The DMA transfer can be used with the direct addressing mode or the indirect
addressing mode. The registers used in these two modes are shown in
Table 6:
[1]
To set up a DMA transfer, the following HC registers must be configured depending
on the type of transfer required:
Addressing mode
Direct addressing
Indirect addressing
•
•
write_reg16(HcTransferCnt,word_size*2);
outport(hc_com,HcATL_Port|0x80);
cnt=0;
do
{
outport(hc_data,*(a_ptr+cnt));
cnt++;
}
while(cnt<(word_size));
HcHardwareConfiguration
Hc PInterruptEnable
– DREQ1 output polarity (bit 5)
– DACK1 input polarity (bit 6)
– DACK mode (bit 8).
– If you want an interrupt to be generated after the DMA transfer is complete, set
In the direct addressing mode, HcTransferCounter must be set to 0001H.
EOTInterruptEnable (bit 3).
Registers used in addressing modes
2. Incorrect setting of the HcTransferCounter register may cause the
Rev. 03 — 06 January 2004
[1]
HcDMAConfiguration bit[3:1]
1XXB
0XXB
// data port
// hc_data is system address of HC
// command port
// hc_com is system address of HC
Single-chip USB OTG controller
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Total bytes to transfer
HcDirectAddressLength
HcTransferCounter
ISP1362
Table
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6.