ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 8
![no-image](/images/no-image-200.jpg)
ISP1362EE/01
Manufacturer Part Number
ISP1362EE/01
Description
Single-chip Universal Serial Bus On-The-Go controller
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.ISP1362EE01.pdf
(150 pages)
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Philips Semiconductors
Table 2:
9397 750 12337
Product data
Symbol
DGND
D2
D3
V
D4
D5
D6
D7
DGND
D8
D9
D10
D11
CC
[1]
Pin description
1
2
3
4
5
6
7
8
9
10
11
12
13
LQFP64
Pin
7.2 Pin description
B1
C2
C1
D2
D1
E2
E1
F2
F1
G2
G1
H2
H1
TFBGA64
Ball
Type
-
I/O
I/O
-
I/O
I/O
I/O
I/O
-
I/O
I/O
I/O
I/O
[2]
Rev. 03 — 06 January 2004
Description
digital ground
bit 2 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
bit 3 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
supply voltage (3.3 V); it is recommended to connect a decoupling
capacitor of 0.01 F
bit 4 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
bit 5 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
bit 6 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
bit 7 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
digital ground
bit 8 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
bit 9 of the bidirectional data bus that connects to the internal registers
and buffer memory of the ISP1362; the bus is in the high-impedance
state when it is idle
bidirectional, push-pull input, three-state output
bit 10 of the bidirectional data bus that connects to the internal
registers and buffer memory of the ISP1362; the bus is in the
high-impedance state when it is idle
bidirectional, push-pull input, three-state output
bit 11 of the bidirectional data bus that connects to the internal
registers and buffer memory of the ISP1362; the bus is in the
high-impedance state when it is idle
bidirectional, push-pull input, three-state output
Single-chip USB OTG controller
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1362
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