ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 73
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ISP1362EE/01
Manufacturer Part Number
ISP1362EE/01
Description
Single-chip Universal Serial Bus On-The-Go controller
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet
1.ISP1362EE01.pdf
(150 pages)
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Philips Semiconductors
Table 39:
9397 750 12337
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
HcCommandStatus register: bit allocation
31
23
15
7
-
-
-
-
-
-
-
-
15.1.3 HcCommandStatus register (R/W: 02H/82H)
The HcCommandStatus register is a 4-byte register, and the bit allocation is given in
Table
and it also reflects the current status of the HC. To the HCD, it appears to be a ‘write
to set’ register. The HC must ensure that bits written as logic 1 become set in the
register while bits written as logic 0 remain unchanged in the register. The HCD may
issue multiple distinct commands to the HC without concern for corrupting previously
issued commands. The HCD has normal read access to all bits.
The SchedulingOverrunCount (SOC) field indicates the number of frames with which
the HC has detected the scheduling overrun error. This occurs when the Periodic list
does not complete before the End-of-Frame (EOF). When a scheduling overrun error
is detected, the HC increments the counter and sets the SchedulingOverrun (SO)
field of the HcInterruptStatus register.
Code (Hex): 02 — read
Code (Hex): 82 — write
30
22
14
6
-
-
-
-
-
-
-
-
39. This register is used by the HC to receive commands issued by the HCD,
29
21
13
5
-
-
-
-
-
-
-
-
Rev. 03 — 06 January 2004
reserved
reserved
28
20
12
4
-
-
-
-
-
-
-
-
reserved
reserved
27
19
11
3
-
-
-
-
-
-
-
-
Single-chip USB OTG controller
26
18
10
2
-
-
-
-
-
-
-
-
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
25
17
R
0
9
1
-
-
-
-
-
-
ISP1362
SOC[1:0]
HCR
R/W
73 of 150
24
16
R
0
8
0
0
-
-
-
-
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