ISP1362EE/01 PHILIPS [NXP Semiconductors], ISP1362EE/01 Datasheet - Page 117

• Manufacturer Part Number: ISP1362EE/01
• Description: Single-chip Universal Serial Bus On-The-Go controller
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
Table 116: DcInterruptEnable register: bit allocation
9397 750 12337
Product data
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
Bit
Symbol
Reset
Access
reserved
IEP14
IEP6
R/W
R/W
31
23
15
0
0
7
-
-
-
-
16.1.6 DcDMAConfiguration (R/W: F1H/F0H)
SP_IEEOT
Code (Hex): C2/C3 — write or read InterruptEnable register
Transaction — write or read 4 bytes (code or data)
Table 117: DcInterruptEnable register: bit description
This command defines the DMA configuration of the DC and enables or disables
DMA transfers. The command accesses the DcDMAConfiguration register, which
consists of two bytes. The bit allocation is given in
bit DMAEN (DMA disabled), all other bits remain unchanged.
Code (Hex): F0/F1 — write or read DMA Configuration
Transaction — write or read 2 bytes (code or data)
Bit
31 to 24
23 to 10
9
8
7
6
5
4
3
2
1
0
IEP13
IEP5
R/W
R/W
R/W
30
22
14
0
0
6
0
-
-
Symbol
-
IEP14 to IEP1 Logic 1 enables interrupts from the indicated endpoint.
IEP0IN
IEP0OUT
-
SP_IEEOT
IEPSOF
IESOF
IEEOT
IESUSP
IERESM
IERST
IEPSOF
IEP12
IEP4
R/W
R/W
R/W
29
21
13
0
0
5
0
-
-
Rev. 03 — 06 January 2004
IESOF
IEP11
Description
reserved; must write logic 0
Logic 1 enables interrupts from the control IN endpoint.
Logic 1 enables interrupts from the control OUT endpoint.
reserved
Logic 1 enables interrupt upon detection of a short packet.
Logic 1 enables 1 ms interrupts upon detection of Pseudo SOF.
Logic 1 enables interrupt upon the SOF detection.
Logic 1 enables interrupt upon the EOT detection.
Logic 1 enables interrupt upon detection of a ‘suspend’ state.
Logic 1 enables interrupt upon detection of a ‘resume’ state.
Logic 1 enables interrupt upon detection of a bus reset.
IEP3
R/W
R/W
R/W
28
20
12
0
0
4
0
-
-
reserved
IEEOT
IEP10
IEP2
R/W
R/W
R/W
27
19
11
0
0
3
0
-
-
IESUSP
Table
Single-chip USB OTG controller
IEP9
IEP1
R/W
R/W
R/W
26
18
10
0
0
2
0
-
-
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
118. A bus reset will clear
IERESM
IEP0IN
IEP8
R/W
R/W
R/W
25
17
0
9
0
1
0
-
-
ISP1362
IEP0OUT
IERST
117 of 150
IEP7
R/W
R/W
R/W
24
16
0
8
0
0
0
-
-