LPC47M172_07 SMSC [SMSC Corporation], LPC47M172_07 Datasheet - Page 174

• Manufacturer Part Number: LPC47M172_07
• Description: Advanced I/O Controller with Motherboard GLUE Logic
• Manufacturer: SMSC [SMSC Corporation]

Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
11.1.8 Programming Example
The following is an example of a configuration program in Intel 8086 assembly language.
Notes:
LD_NUM Bit
SMSC/Non-SMSC Register Sets (Rev. 01-11-07)
HARD RESET: nPCI_RESET pin asserted
SOFT RESET: Bit 0 of Configuration Control register set to one
All host accesses are blocked for 500µs after Vcc POR (see Power-up Timing Diagram)
The LD_NUM bit in the TEST 7 global configuration register (0x29) is used to select between the logical
device numbering in the LPC47M172. LD_NUM is determined by the state of pin 117 as described in
Chapter 2. See the TEST 7 register for LD_NUM bit description. Table 11.1 and Table 11.2 summarize
the logical device registers when LD_NUM bit is 0 and 1.
;-------------------------------------------------.
; ENTER CONFIGURATION MODE |
;-------------------------------------------------‘
MOV
MOV
OUT
;-----------------------------------------------.
; CONFIGURE REGISTER CRE0, |
; LOGICAL DEVICE 8
;-----------------------------------------------‘
MOV
MOV
OUT
MOV
MOV
OUT
;
MOV
MOV
OUT
MOV
MOV
OUT
;------------------------------------------------.
; EXIT CONFIGURATION MODE
;-----------------------------------------------‘
MOV
MOV
OUT
DX,02EH
AX,055H
DX,AL
DX,02EH
AL,07H
DX,AL ;Point to LD# Config Reg
DX,02FH
AL, 08H
DX,AL;Point to Logical Device 8
DX,02EH
AL,E0H
DX,AL
DX,02fH
AL,02H
DX,AL
DX,02EH
AX,0AAH
DX,AL
DATASHEET
; Point to CRE0
; Update CRE0
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SMSC LPC47M172