LPC47M172_07 SMSC [SMSC Corporation], LPC47M172_07 Datasheet - Page 3

• Manufacturer Part Number: LPC47M172_07
• Description: Advanced I/O Controller with Motherboard GLUE Logic
• Manufacturer: SMSC [SMSC Corporation]

Table Of Contents
Chapter 1
Chapter 2
Chapter 3
Chapter 4
Chapter 5
Chapter 6
SMSC/Non-SMSC Register Sets (Rev. 01-11-07)
3.1
3.2
3.3
3.4
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
5.3.1
5.5.1
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
6.3.7
6.3.8
6.3.9
6.3.10
6.3.11
6.4.1
6.4.2
6.4.3
6.4.4
6.4.5
6.4.6
6.4.7
6.4.8
6.4.9
6.4.10
6.4.11
6.4.12
6.5.1
6.5.2
6.5.3
6.7.1
6.7.2
Buffer Name Descriptions ..........................................................................................................................22
Pins With Internal Resistors .......................................................................................................................23
Pins That Require External Resistors.........................................................................................................23
Default State of Pins...................................................................................................................................24
3 Volt Operation / 5 Volt Tolerance ............................................................................................................29
VCC Power ................................................................................................................................................29
VTR Power.................................................................................................................................................29
V5P0_STBY Power ....................................................................................................................................30
32.768 kHz Trickle Clock Input...................................................................................................................30
14.318 MHz Clock Input .............................................................................................................................31
Internal PWRGOOD ...................................................................................................................................31
Maximum Current Values...........................................................................................................................31
Power Management Events (PME/SCI) .....................................................................................................31
Super I/O Registers....................................................................................................................................32
Host Processor Interface (LPC) .................................................................................................................33
LPC Interface .............................................................................................................................................33
Floppy Disk Controller ................................................................................................................................37
Modes of Operation....................................................................................................................................51
DMA Transfers ...........................................................................................................................................51
Controller Phases.......................................................................................................................................52
Data Transfer Termination .........................................................................................................................53
General Description.............................................................................................................. 11
Pin Layout ............................................................................................................................ 12
Description of Pin Functions ................................................................................................ 14
Block Diagram ...................................................................................................................... 28
Power and Clock Functionality............................................................................................. 29
Trickle Power Functionality .................................................................................................................30
Indication of 32KHZ Clock...................................................................................................................30
Functional Description.......................................................................................................... 32
LPC Interface Signal Definition ...........................................................................................................33
LPC Cycles .........................................................................................................................................33
Field Definitions...................................................................................................................................33
NLFRAME Usage................................................................................................................................34
I/O Read and Write Cycles..................................................................................................................34
DMA Read and Write Cycles ..............................................................................................................34
DMA Protocol ......................................................................................................................................34
Power Management ............................................................................................................................35
SYNC Protocol ....................................................................................................................................35
FDC Configuration Registers ..............................................................................................................37
FDC Internal Registers........................................................................................................................37
Status Register A (SRA) .....................................................................................................................38
Status Register B (SRB) .....................................................................................................................39
Digital Output Register (DOR).............................................................................................................41
Tape Drive Register (TDR) .................................................................................................................42
Data Rate Select Register (DSR)........................................................................................................43
Main Status Register...........................................................................................................................45
Data Register (FIFO)...........................................................................................................................46
PC/AT Mode .......................................................................................................................................51
PS/2 Mode ..........................................................................................................................................51
Model 30 Mode ...................................................................................................................................51
Command Phase ................................................................................................................................52
Execution Phase .................................................................................................................................52
I/O and DMA START Fields.............................................................................................................36
LPC Transfers .................................................................................................................................36
Digital Input Register (DIR)..............................................................................................................47
Configuration Control Register (CCR) .............................................................................................48
Status Register Encoding ................................................................................................................49
DATASHEET
Page 3
Advanced I/O Controller with Motherboard GLUE Logic
SMSC LPC47M172
Datasheet