LPC47M172_07 SMSC [SMSC Corporation], LPC47M172_07 Datasheet - Page 185

• Manufacturer Part Number: LPC47M172_07
• Description: Advanced I/O Controller with Motherboard GLUE Logic
• Manufacturer: SMSC [SMSC Corporation]

Note 1:
Note A.
1.
A. FDC: For the following cases, the IRQ and DMA channel used by the FDC are disabled.
Digital Output Register (Base+2) bit D3 (DMAEN) set to “0”.
The FDC is in power down (disabled).
B. Serial Port:
Modem Control Register (MCR) Bit D2 (OUT2) - When OUT2 is a logic “0”, the serial port interrupt is disabled.
C. Parallel Port:
I.
ii.
D. Keyboard Controller: Refer to the KBD section of this spec.
SMSC LPC47M172
- For the PP logical device in ECP mode by setting dmaEn, bit D3 of the ecr.
The DMA channel must be disabled if not used/selected by any Logical Device. Refer to Note A.
IRQ and DMA Enable and Disable: Any time the IRQ or DMA channel for a logical block is disabled by a register bit
in that logical block, the IRQ and/or DMA channel must be disabled. This is in addition to the IRQ and DMA
channel disabled by the Configuration Registers (active bit or address not valid).
SPP and EPP modes: Control Port (Base+2) bit D4 (IRQE) set to “0”, IRQ is disabled.
ECP Mode:
(1) (DMA) dmaEn from ecr register. See table.
(2) IRQ - See table.
The default value of the DMA Channel Select register for logical device 0 (FDD) is 0x02 and for logical
device 3 is 0x04.
Logical Device IRQ and DMA Operation
(FROM ECR REGISTER)
000
001
010
011
100
101
110
111
MODE
PRINTER
CONFIG
TEST
FIFO
SPP
ECP
EPP
RES
DATASHEET
Page 185
CONTROLLED BY
IRQE
IRQE
IRQE
IRQE
IRQE
IRQ
(on)
(on)
(on)
Advanced I/O Controller with Motherboard GLUE Logic
SMSC/Non-SMSC Register Sets (Rev. 01-11-07)
CONTROLLED BY
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
dmaEn
DMA
Datasheet