LPC47M172_07 SMSC [SMSC Corporation], LPC47M172_07 Datasheet - Page 222

• Manufacturer Part Number: LPC47M172_07
• Description: Advanced I/O Controller with Motherboard GLUE Logic
• Manufacturer: SMSC [SMSC Corporation]

Advanced I/O Controller with Motherboard GLUE Logic
Datasheet
Note 1:
Note 2:
Note 3:
SMSC/Non-SMSC Register Sets (Rev. 01-11-07)
NAME
V
t1
t2
t3
t4
TRIP
V_5P0_STBY
nRSMRST
VTR (3.3V)
DESCRIPTION
Treset delay. V_5P0_STBY active to
nRSMRST inactive
Treset_fall. V_5P0_STBY inactive to
nRSMRST active (Glitch width allowance)
Treset_rise
V_5P0_STBY active to VTR active
V_5P0_STBY inactive to VTR inactive
V_5P0_STBY low trip voltage
The nRSMRST will be inactive high max 100 msec after V_5P0_STBY is active assuming the VTR (3.3V)
is active. If the VTR (3.3V) is not active within 100 msec, the delay from V_5P0_STBY will be greater than
100 msec and the nRSMRST will go inactive when VTR (3.3V) goes active.
The V_5P0_STBY supply must power up before or simultaneous with VTR, and must power down
simultaneous with or after VTR (from ICH2 data sheet)
The trip point can vary between these limits on a per part basis, but on a given part it should remain
relatively stable.
Min
Vtrip
Max
Figure 13.30 - Reseme Reset Sequence
t1
Table 13.7 - Resume Reset Timing
t3
DATASHEET
Page 222
MIN
4.2
10
0
0
t4
TYP
32
t2
MAX
100
100
100
4.5
UNITS
msec
msec
msec
nsec
nsec
V
SMSC LPC47M172
Notes
1
2
2
3